(j3.2006) (SC22WG5.5901) 3 levels of parallelism?

David Muxworthy d.muxworthy
Wed Jul 5 18:19:43 EDT 2017


Due to a glitch in the sc22wg5 mail server (it seems to have mislaid the most recent whitelist) this message
from Brian Friesen was incorrectly rejected.

> Begin forwarded message:
> 
> From: Brian Friesen <bfriesen at lbl.gov>
> Subject: Re: (j3.2006) (SC22WG5.5898) 3 levels of parallelism?
> Date: 5 July 2017 at 23:05:34 BST
> To: fortran standards email list for J3 <j3 at mailman.j3-fortran.org>
> Cc: sc22wg5 <sc22wg5 at open-std.org>
> Reply-To: fortran standards email list for J3 <j3 at mailman.j3-fortran.org>
> 
> On Wed, Jul 5, 2017 at 12:49 PM, Clune, Thomas L. (GSFC-6101) <thomas.l.clune at nasa.gov <mailto:thomas.l.clune at nasa.gov>> wrote:
> I think the concern is that in practice, the user needs to be able to control the division of work between the two levels to optimize performance.   A model where the compiler will make the decisions will be easier to use, but ?
> 
> The history of optimization in real codes is littered with the difference between ?in theory? and ?in practice?.
> 
> But isn't the point of the language to be descriptive, not prescriptive? Controlling the division of work among different types of parallelism seems like a job for programming models like OpenMP, OpenACC, etc. They evolve rapidly and follow architecture trends. OpenMP already supports both thread- and SIMD-level parallelism. (Don't know about OpenACC.)
> 
> Or did you have something more subtle in mind?

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