(j3.2006) (SC22WG5.5896) 3 levels of parallelism?

[Van Snyder]

On Wed, 2017-07-05 at 13:30 -0600, Keith Bierman wrote:
> Compiling directly to the FPGA would be nice; but assuming that's
> still done in verilog ... I assume coroutines would be our best
> bet ... any other obvious approaches (that someone is prepared to say
> anything about ... without an NDA ;>). 

Coroutines have numerous other applications.  William Wulf remarked on
their applications to parallelism more than thirty years ago.  The way
we designed them for their short life on the 2008 wish list they were
inherently thread safe, provided they were pure, and were invoked using
a procedure pointer.