(j3.2006) (SC22WG5.3611) Preparing for the Tokyo meeting
Mon Nov 3 14:48:53 EST 2008
On Nov 3, 2008, at 12:24 PM, Lawrie Schonfelder wrote:
> I ... particular multiprocessor architectures...
Given the ever growing pool of multi-core (and/or multithreaded)
processors ... and the sheer physical difficultly of arbitrarily
increasing clock speeds, I think the particular multiprocessor
architectures to which this facility applies is virtually all
interesting ones going forward (OK, PDA/handheld phones may well NOT
go multi-core in a big way, as power is their biggest driver ... but
is Fortran really focused on that sort of thing? Should it??).
> I will accept a lack of detailed direct experience but I would be
> very surprised if co-arrays were anything but useless on an
> architecture that was a tree-structure of multi-level separate
> memory processors, such as I recall being constructed using
> transputer chips in the 1990s; useless as general purpose machines
> but for specific problems where the problem and the interconnection
> matched, the solution performance improvement was considerable
As distasteful as the thought is, I suspect that such ensembles will
be constructed of multi-core/multi-threaded elements, so one will
eventually have to figure out how to program using both paradigms.
Fortran is primarily used for numerical computing where speed counts;
so features necessary for performance should remain on the
committee's radar...at least IMNSHO.
Keith H. Bierman khbkhb at gmail.com | AIM kbiermank
5430 Nassau Circle East |
Cherry Hills Village, CO 80113 | 303-997-2749
<speaking for myself*> Copyright 2008
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