(j3.2006) Is Moore's law over?

[Clune, Thomas L. GSFC-610.3]

On Aug 21, 2008, at 8:52 PM, Dan Nagle wrote:

> Hello,
>
> On Aug 21, 2008, at 8:38 PM, Van Snyder wrote:
> >
> > We're thinking about DSP/GPU coprocessors for these two subproblems,
> > but
> > then there's the rest....
> >
> > There isn't much of our program of the form "do n**3 things on n**2
> > data."  Mostly (82% or so) it's "do n things on n data."  That is,
> > it's
> > mostly memory-bandwidth limited, not cache- or processor-bandwidth
> > limited.
>
>
> If you're bandwidth limited, there's absolutely *no way* in silicon
> that a DSP/GPU can save you.  The big problem with them is their
> load and unload bandwidths.
>
>

_If_ one's memory footprint is sufficiently small then the entire  
domain can be placed on the high-speed memory within a GPGPU.  Even if  
not, the IBM Cell tends to get such a high percentage of peak  
bandwidth too/from main memory that one can still beat conventional  
technology by a healthy factor.  (Won't defend cost performance though.)

In any event, Moore's law is not the problem here.   The transistor  
density is still growing on a nice exponential.   Van's problem is  
with Amdahl's law.   Plenty of memory bandwidth out there if you can  
distribute your data sufficiently.   Might waste a few bucks on the  
unused CPU cores, but those are getting cheap compared to memory anyway.

Cheers,

- Tom


> Game over.  Insert 25 cents.  ;-)
>
> It appears that Actual Thought will be required.
>
> --
> Cheers!
>
> Dan Nagle
>
>
>
>
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Thomas Clune, Ph.D.							301-286-4635 (W)
Advanced Software Technology Group			240-266-0400 (F)
Software Integration and Visualization Office	<Thomas.L.Clune at nasa.gov>
NASA GSFC (610.3)                              			 <http://sivo.gsfc.nasa.gov 
 >




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