(j3.2006) Question about IEEE assignment and derived types
Sat Dec 15 07:30:01 EST 2007
Dick Hendrickson wrote:
> Bill Long wrote:
>>Dick Hendrickson wrote:
>>>This is a multi-part question and everything depends on the
>>>answer to the first question. If that is NO, then everything
>>>that follows isn't interesting.
>>>1) It's my understanding that IEEE conformance requires raising
>>>an exception whenever a NaN is used (assuming that the correct
>>>IEEE modules are used and that enough IEEE_SET routines have
>>>been called). If so, does this mean that
>>> A = B
>>>must raise an exception if B is a NaN?
>>No. Assignment is not an "operation" and the IEEE standard explicitly
>>says that raising an exception in this case in not required.
> I found the IEEE standard on the J3 site and read part of it. It
> looks to me like it is an implementation option whether or not
> the load/store of a signaling NaN raises a signal is processor
> Does that make the answer to all 5 questions "processor dependent"?
> That doesn't seem very user friendly for the 4) and 5) unusual
> cases. (And, yes, I meant to say signaling NaN in the original
> post, sorry.)
The cost of checking for signaling NaNs when copying floating-point
data in all cases would kill performance on modern CPUs. Code that
does not for signaling NaNs when moving data is almost always more
efficient than code that checks for signaling NaNs. One exception of
which I am aware is that some IA-32 processors that do not implement
the SSE instructions can move DOUBLE PRECISION data faster using the
x87 registers than any other way. When the x87 registers are used,
the data is converted going in and coming out. The conversions will
trigger an invalid exception when the datum being moved is a
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