(j3.2006) Liaison to IFIP WG 2.5

[Van Snyder]

On Tue, 2007-08-21 at 11:12 -0700, Aleksandar Donev wrote:

> > 2) Hardware support needs to be widespread to make something beyond a
> > module worthwhile from a performance point of view.  That means, at a
> > minimum, that IEEE 754r++ specify a standard.
> Yes, I see hardware support as a necessary precondition.
> 
> Personally, I've wondered if it is possible to do interval FP in an additional 
> off-processor unit (like GPUs or FPGAs or some other thing one can add to a 
> processor)? Interval arithmetic is nice to have but IMO it is almost never 
> necessary that ALL floating-point calculations be done with intervals. 
> Certainly not at the cost of the usual FP calculations.

Kulisch and IFIP WG 2.5 are not proposing that all FP in a processor be
interval FP, rather that additional interval FP instructions be
provided.

Kulisch showed a PCI card with an interval co-processor on it.  It was
an old slow design from some years ago, but still faster than interval
FP done with software in a Pentium 4.

-- 
Van Snyder                    |  What fraction of Americans believe 
Van.Snyder at jpl.nasa.gov       |  Wrestling is real and NASA is fake?
Any alleged opinions are my own and have not been approved or
disapproved by JPL, CalTech, NASA, the President, or anybody else.