(j3.2006) Liaison to IFIP WG 2.5

keith bierman khbkhb
Tue Aug 21 12:02:31 EDT 2007

On Aug 21, 2007, at 9:43 AM, Bill Long wrote:

> ...is that bad.  I suspect this 100X estimate is way off base.    
> I'd guess
> more like 2X.

For many things it's much worse than 2x. I don't have data handy.
>> .....
> We already have a great facility for intervals build into Fortran -
> modules.  I think there would need to be two preconditions satisfied
> before it was interesting to go beyond that:
> 1) There would have to be significant customer demand (so far I've  
> seen
> exactly zero such demand), and
> 2) Hardware support needs to be widespread to make something beyond a
> module worthwhile from a performance point of view.  That means, at a
> minimum, that IEEE 754r++ specify a standard.

Of course, J3 and Wg5 considered this at great length some years  
back. Modules do not allow for integration into the optimization or  
for context sensitive "sharpness" optimization. both of which are  
pretty fatal flaws for having a really useful facility.

But it's not on the chart of work for this revision of the Standard,  
so I don't see any point in flogging really dead horses.

btw: aside from the number of transistors, hardware types usually get  
bent out of shape regarding latency, pipeline hazards, and additional  
*wires* (a much harder problem than transistors).

Keith H. Bierman   khbkhb at gmail.com
<speaking for myself*> Copyright 2007

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